Cadence, NEC Announce Encounter Digital Implementation System to Support NEC Electronics' System LSI with Built-In V850 CPU Core

NEC Electronics Achieves 50 Percent Reduction in Design Turnaround Time for Leading-Edge System LSI

KAWASAKI, Japan and SAN JOSE, Calif., March 30, 2009 -- Cadence Design Systems Inc. (NASDAQ: CDNS), the leader in global electronics design innovation, and NEC Electronics Corporation (TSE: 6723), a leading provider of semiconductor solutions, today announced the development of prototypes of NEC Electronics' state-of-the-art V850™ -based System LSI, made possible by support of Cadence's new Encounter Digital Implementation System v8.1. NEC Electronics developed its LSIs next-generation CPU core, successfully reducing the total design turnaround time (TAT) by fifty percent while including complete full multi-mode, multi-corner analysis and optimization throughout the back end of the design flow.

Since the introduction of the first single-chip microcontroller with the V850 core in April 1996, NEC Electronics has steadily established a solid lineup of V850 series products and has extended the product portfolio to ASSPs and IP cores for ASICs. To further enhance quality and support to its customers, NEC Electronics collaborated with Cadence, which has a proven record as a top supplier of electronic design technologies for system LSIs. This collaboration has enabled NEC Electronics to significantly shorten its design TAT and improve production efficiency. Cadence provided NEC Electronics with a reliable multi-mode, multi-corner analysis that provides consistent results with Encounter Digital Implementation System resulting in a more productive environment and a shorter TAT.

"The ability to deliver superior silicon reliability, performance, and area savings, as well as fast time to market, are critical factors to our success in serving our customers," said Michiya Nakamura, general manager of the 1st Microcomputer Division, NEC Electronics Corporation. "Using the Encounter Digital Implementation System, we were able to meet all of the strict design metrics for these advanced system LSI designs, and in half the time of our previous flow. We were especially pleased by the high performance and capacity scalability of the Encounter Digital Implementation System, as well as its robust multi-mode, multi-corner analysis and optimization features, which enabled us to achieve more efficiency in our flow and better quality of results."

The Cadence® Encounter® Digital Implementation System is a configurable digital implementation platform delivering scalability with complete support for parallel processing across the design flow. The system also brings an ultra-efficient new core memory architecture delivering higher-performance, higher-capacity design closure for single CPU operations.

"NEC Electronics' experience consistently demonstrates that the new Encounter Digital Implementation System is delivering new levels of productivity for advanced digital IC designs," said Chi-Ping Hsu, senior vice president of research and development for the Implementation Products Group at Cadence. "The new Encounter Digital Implementation System provides customers with a completely unified digital implementation environment with foundry qualified accurate signoff engines. The system is now broadly deployed worldwide to address complex design closure, low power, mixed signal and advanced node requirements."

NEC Electronics intends to actively utilize the technologies and experience accumulated through the collaboration with Cadence and extend those to the company's other products to provide customers with the highest quality and performance solutions for system development.

Source: Cadence